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mt9v032: 1/3-inch wide-vga digital image sensor features preliminary ? pdf: 09005aef824c9998/source: 09005aef824c999c micron technology, inc., reserves the right to change products or specifications without notice. mt9v032_lds_1.fm - rev. b 3/07 en 1 ?2006 micron technology, inc. all rights reserved. 1/3-inch wide-vga cmos digital image sensor mt9v032c12stm (monochrome, pb-free) MT9V032C12STC (color, pb-free) features ?micron ? digitalclarity ? cmos imaging technology ? array format: wide-vga, active 752h x 480v (360,960 pixels) ? global shutter photodiode pixels; simultaneous integration and readout ? monochrome or color: near_ir enhanced performance for use with non-visible nir illumination ? readout modes: progressive or interlaced ? shutter efficiency: >99% ? simple two-wire serial interface ? register lock capability ? window size: user programmable to any smaller format (qvga, cif, qcif, and so on). data rate can be maintained independent of window size ? binning: 2 x 2 and 4 x 4 of the full resolution ? adc: on-chip, 10-bit column-parallel (option to operate in 12-bit to 10-bit companding mode) ? automatic controls: auto exposure control (aec) and auto gain control (agc); variable regional and variable weight aec/agc ? support for four unique serial control register ids to control multiple imagers on the same bus ? data output formats: ? single sensor mode: 10-bit parallel/stand-alone 8-bit or 10-bit serial lvds ? stereo sensor mode: interspersed 8-bit serial lvds applications ?security ? high dynamic range imaging ? unattended surveillance ? stereo vision ?video as input ?machine vision ?automation ? traffic camera table 1: key performance parameters ordering information parameter value optical format 1/3-inch active imager size 4.51mm(h) x 2.88mm(v) 5.35mm diagonal active pixels 752h x 480v pixel size 6. 0m x 6.0m color filter array monochrome or color rgb bayer pattern shutter type global shutter?truesnap ? maximum data rate/ master clock 26.6 mps/26.6 mhz full resolution 752 x 480 frame rate 60 fps (at full resolution) adc resolution 10-bit column-parallel responsivity 4.8 v/lux-sec (550nm) dynamic range >55db linear; >80 ? 100db in hidy mode supply voltage 3.3v + 0.3v ( all supplies) power consumption <320mw at maximum data rate; 100w standby current operating temperature ?30c to +70c packaging 48-pin clcc output gain 15.3 e-/lsb read noise 25 e-prms at 1x dark current 9,042 e-/pix/s at 55c table 2: available part numbers part number description mt9v032c12stm es 48-pin clcc (mono) MT9V032C12STC es 48-pin clcc (color) mt9v032c12stmd es demo kit (mono) mt9v032c12stmh es demo kit headboard only (mono) MT9V032C12STCd es demo kit (color) MT9V032C12STCh es demo kit headboard only (color)
pdf: 09005aef824c9998/source: 09005aef824c999c micron technology, inc., reserves the right to change products or specifications without notice. mt9v032_lds_2.fm - rev. b 3/07 en 2 ?2006 micron technology, inc. all rights reserved. mt9v032: 1/3-inch wide-vga digital image sensor general description preliminary ? general description the micron imaging mt9v032 is a 1/3-inch wi de-vga format cmos active-pixel digital image sensor with global sh utter and high dynamic range (hdr) operation. the sensor has specifically been designed to support the demanding interior and exterior unat- tended surveillance imaging needs, which makes this part ideal for a wide variety of imaging applications in real-world environments. this wide-vga cmos image sensor features digitalclarity ? micron?s breakthrough low-noise cmos imaging technology that achi eves ccd image qualit y (based on signal- to-noise ratio and low-light sensitivity) wh ile maintaining the inherent size, cost, and integration advantages of cmos. the active imaging pixel array is 752h x 480v . it incorporates sophisticated camera functions on-chip?such as binning 2 x 2 an d 4 x 4, to improve sensitivity when oper- ating in smaller resolutions?as well as windowing, column and row mirroring. it is programmable through a simple two-wire serial interface. the mt9v032 can be operated in its default mode or be programmed for frame size, exposure, gain setting, and other paramete rs. the default mode outputs a wide-vga- size image at 60 fram es per second (fps). an on-chip analog-to-digital converter (adc) pr ovides 10 bits per pi xel. a 12-bit resolu- tion companded for 10-bits for small signals ca n be alternatively enabled, allowing more accurate digitization for darker areas in the image. in addition to a traditional, parallel logic output the mt9v032 also features a serial low- voltage differential signaling (lvds) output. the sensor can be operated in a stereo- camera mode, and the sensor, designated as a stereo-master, is able to merge the data from itself and the stereo-slave sensor into one serial lvds stream. figure 1: block diagram parallel vi d eo data out s erial re g ister i/o c ontrol re g ister ad c s a c tive-pixel s ensor (ap s ) array 752h x 480v timin g an d c ontrol di g ital pro c essin g analo g pro c essin g s erial vi d eo lvd s out s lave vi d eo lvd s in (for stereo appli c ations only)
pdf: 09005aef824c9998/source: 09005aef824c999c micron technology, inc., reserves the right to change products or specifications without notice. mt9v032_lds_2.fm - rev. b 3/07 en 3 ?2006 micron technology, inc. all rights reserved. mt9v032: 1/3-inch wide-vga digital image sensor general description preliminary ? figure 2: mt9v032 quantum efficiency vs. wavelength 0 5 10 15 20 25 30 35 40 350 450 550 6 50 750 850 950 1050 wavelen g th (nm) ) % ( y c n e i c i f f e m u t n a u q blue g reen (b) g reen (r) re d
pdf: 09005aef824c9998/source: 09005aef824c999c micron technology, inc., reserves the right to change products or specifications without notice. mt9v032_lds_2.fm - rev. b 3/07 en 4 ?2006 micron technology, inc. all rights reserved. mt9v032: 1/3-inch wide-vga digital image sensor pin descriptions preliminary ? pin descriptions figure 3 shows the package pinout for the mt9v032. table 3 on page 5 provides the pin descriptions. figure 3: 48-pin clcc package pinout diagram 1 2 3 4 5 6 44 43 19 20 21 22 23 24 25 2 6 27 28 29 30 7 8 9 10 11 12 13 14 15 1 6 17 18 42 41 40 39 38 37 3 6 35 34 33 32 31 lvd sg nd bypa ss _ c lkin_n bypa ss _ c lkin_p s er_datain_n s er_datain_p lvd sg nd d g nd v dd d out 5 d out 6 d out 7 d out 8 d out 3 d out 4 vaapix v aa a g nd n c n c v aa a g nd s tandby re s et# s _ c trl_adr1 d out 9 line_valid frame_valid s tln_out expo s ure s data sc lk s tfrm_out led_out oe r s vd s _ c trl_adr0 vddlvd s s er_dataout_n s er_dataout_p s hft_ c lkout_n s hft_ c lkout_p v dd d g nd s y sc lk pix c lk d out 0 d out 1 d out 2 48 47 4 6 45
pdf: 09005aef824c9998/source: 09005aef824c999c micron technology, inc., reserves the right to change products or specifications without notice. mt9v032_lds_2.fm - rev. b 3/07 en 5 ?2006 micron technology, inc. all rights reserved. mt9v032: 1/3-inch wide-vga digital image sensor pin descriptions preliminary ? table 3: pin descriptions only pins d out 0 through d out 9 may be tri-stated pin number symbol type description notes 29 rsvd input connect to d gnd . 1 10 ser_datain_n input serial data in for stereoscopy (differential negative). tie to 1k pull-up (to 3.3v) in non-stereoscopy mode. 11 ser_datain_p input serial data in for stereoscopy (differential positive). tie to d gnd in non-stereoscopy mode. 8 bypass_clkin_n input input bypass shift-clk (diffe rential negative). tie to 1k pull-up (to 3.3v) in non-stereoscopy mode. 9 bypass_clkin_p input input bypass shift-clk (diffe rential positive). tie to d gnd in non-stereoscopy mode. 23 exposure input rising edge starts exposure in slave mode. 25 sclk input two-wire serial interface clock. connect to v dd with 1.5k resistor even when no other two-wire serial interface peripheral is attached. 28 oe input d out enable pad, active high. 2 30 s_ctrl_adr0 input two-wire serial interface slave address bit 3. 31 s_ctrl_adr1 input two-wire serial interface slave address bit 5. 32 reset# input asynchronous reset. all registers assume defaults. 33 standby input shut down sensor oper ation for power saving. 47 sysclk input master clock (26.6 mhz). 24 s data i/o two-wire serial interface data. connect to v dd with 1.5k resistor even when no other two-wire serial interface peripheral is attached. 22 stln_out i/o output in master mode ? start line sync to drive slave chip in-phase; input in slave mode. 26 stfrm_out i/o output in master mode ? start frame sync to drive a slave chip in-phase; input in slave mode. 20 line_valid output asserted when d out data is valid. 21 frame_valid output asserted when d out data is valid. 15 d out 5 output parallel pixel data output 5. 16 d out 6 output parallel pixel data output 6. 17 d out 7 output parallel pixel data output 7. 18 d out 8 output parallel pixel data output 8 19 d out 9 output parallel pixel data output 9. 27 led_out output led strobe output. 41 d out 4 output parallel pixel data output 4. 42 d out 3 output parallel pixel data output 3. 43 d out 2 output parallel pixel data output 2. 44 d out 1 output parallel pixel data output 1. 45 d out 0 output parallel pixel data output 0. 46 pixclk output pixel clock out. d out is valid on rising edge of this clock. 2 shft_clkout_n output output shift clk (differential negative). 3shft_clkout_poutput output shift clk (differential positive). 4 ser_dataout_n output serial data out (dif ferential negative). 5 ser_dataout_p output serial data out (dif ferential positive).
pdf: 09005aef824c9998/source: 09005aef824c999c micron technology, inc., reserves the right to change products or specifications without notice. mt9v032_lds_2.fm - rev. b 3/07 en 6 ?2006 micron technology, inc. all rights reserved. mt9v032: 1/3-inch wide-vga digital image sensor pin descriptions preliminary ? notes: 1. pin 29 (rsvd) must be tied to gnd. 2. output enable (oe) tri-states signals d out 0?d out 9. no other signals are tri-stated with oe. 3. no connect. these pins must be left floating for proper operation. figure 4: typical configuration (connection) ? parallel output mode note: lvds signals are to be left floating. 1, 14 v dd supply digital power 3.3v. 35, 39 v aa supply analog power 3.3v. 40 vaapix supply pixel power 3.3v. 6v dd lvds supply dedicated power for lvds pads. 7, 12 lvdsgnd ground dedicated gnd for lvds pads. 13, 48 d gnd ground digital gnd. 34, 38 a gnd ground analog gnd. 36, 37 nc nc no connect. 3 table 3: pin descriptions (continued) only pins d out 0 through d out 9 may be tri-stated pin number symbol type description notes s y sc lk line_valid frame_valid pix c lk d out (9:0) s tandby expo s ure r s vd s _ c trl_adr0 s _ c trl_adr1 lvd sg nd led_out s data sc lk re s et# oe v dd lvd s a g nd d g nd v dd v aa vaapix master c lo c k 0.1 f to c ontroller s tandby from c ontroller or di g ital g nd two-wire s erial interfa c e v dd v aa vaapix to led output 10k 1.5k
pdf: 09005aef824c9998/source: 09005aef824c999c micron technology, inc., reserves the right to change products or specifications without notice. mt9v032_lds_2.fm - rev. b 3/07 en 7 ?2006 micron technology, inc. all rights reserved. mt9v032: 1/3-inch wide-vga digital image sensor electrical specifications preliminary ? electrical specifications table 4: dc electrical characteristics v pwr = 3.3v 0.3v; t a = ambient = 25 c symbol definition condition min typ max unit v ih input high voltage v pwr -0.5 ? v pwr +0.3 v v il input low voltage -0.3 ? 0.8 v i in input leakage current no pull-up resistor; v in = v pwr or v gnd -15.0 ? 15.0 a v oh output high voltage i oh = -4.0ma v pwr -0.7 ? ? v v ol output low voltage i ol = 4.0ma ??0.3v i oh output high current v oh = v dd - 0.7 -9.0 ? ? ma i ol output low current v ol = 0.7 ??9.0ma v aa analog power supply default settings 3.0 3.3 3.6 v i pwr a analog supply current default settings ? 35.0 60.0 ma v dd digital power supp ly default settings 3.0 3.3 3.6 v i pwr d digital supply current default settings, c load = 10pf ?35.060ma vaapix pixel array power supply default settings 3.0 3.3 3.6 v i pix pixel supply curre nt default settings 0.5 1.4 3.0 m v lvds lvds power supply default settings 3.0 3.3 3.6 v i lvds lvds supply current default settings 11.0 13.0 15.0 ma i pwr a standby analog standby supply current stdby = v dd 234a i pwr d standby clock off digital standby supply current with clock off stdby = v dd , clkin = 0 mhz 124a i pwr d standby clock on digital standby supply current with clock on stdby= v dd , clkin = 27 mhz ?1.05? ma table 5: lvds driver dc specifications v pwr = 3.3v 0.3v; t a = ambient = 25 c symbol definition condition min typ max unit |v od | output differential voltage r load = 100 1 % 250 ? 400 mv |dv od | change in v od between complementary output states ??50mv v os output offset voltage 1.0 1.2 1.4 mv dv os change in v os between complementary output states ??35mv i os output current when driver shorted to ground 10 12 ma i oz output current when driver is tri-state 1 10 a
pdf: 09005aef824c9998/source: 09005aef824c999c micron technology, inc., reserves the right to change products or specifications without notice. mt9v032_lds_2.fm - rev. b 3/07 en 8 ?2006 micron technology, inc. all rights reserved. mt9v032: 1/3-inch wide-vga digital image sensor electrical specifications preliminary ? table 6: lvds receiver dc specifications v pwr = 3.3v 0.3v; t a = ambient = 25 c caution stresses greater than those listed in table 7 may cause permanent damage to the device. note: these are stress ratings only, and functional operation of the device at these or any other conditions above those indicated in the operat ional sections of this specification is not implied. exposure to absolute maximum rating conditions fo r extended periods may affect reliability. symbol definition condition min typ max unit v idth + input differential | v gpd | <925mv -100 ? 100 mv iin input current ?? 20 a table 7: absolute maximum ratings symbol parameter min max unit v supply power supply voltage (all supplies) -0.3 4.5 v i supply total power supply current ?200ma i gnd total ground current ?200ma v in dc input voltage -0.3 v dd q + 0.3 v v out dc output voltage -0.3 v dd q + 0.3 v t stg storage temperature -40 +125 c
pdf: 09005aef824c9998/source: 09005aef824c999c micron technology, inc., reserves the right to change products or specifications without notice. mt9v032_lds_2.fm - rev. b 3/07 en 9 ?2006 micron technology, inc. all rights reserved. mt9v032: 1/3-inch wide-vga digital image sensor package dimensions preliminary ? package dimensions figure 5: 48-pin clcc package outline drawing notes: 1. optical center = package center. 2. all dimensions are in millimeters. seating plane 4.4 11.43 5.215 5.715 lid material: borosilicate glass 0.55 thickness wall material: alumina ceramic substrate material: alumina ceramic 0.7 thickness 8.8 4.4 5.715 4.84 5.215 0.8 typ 1.75 0.8 typ 8.8 48 1 10.9 0.1 ctr 47x 1.0 0.2 48x r 0.15 48x 0.40 0.05 11.43 10.9 0.1 ctr lead finish: au plating, 0.50 microns minimum thickness over ni plating, 1.27 microns minimum thickness 2.3 0.2 1.7 first clear pixel optical center 1 c a b optical area optical area: maximum rotation of optical area relative to package edges: 1o maximum tilt of optical area relative to seating plane a : 50 microns maximum tilt of optical area relative to top of cover glass d : 100 microns a d 0.90 for reference only 1.400 0.125 0.35 for reference only v ctr ?0.20 a b c h ctr ?0.20 a b c image sensor die: 0.675 thickness 0.10 a 0.05 0.2 4x
pdf: 09005aef824c9998/source: 09005aef824c999c micron technology, inc., reserves the right to change products or specifications without notice. mt9v032_lds_2.fm - rev. b 3/07 en 10 ?2006 micron technology, inc. all rights reserved. mt9v032: 1/3-inch wide-vga digital image sensor appendix a ? serial configurations preliminary ? appendix a ? serial configurations with the lvds serial video output, the dese rializer can be up to 8 meters from the sensor. the serial link can save on the cabling cost of 14 wires (d out [9:0], line_valid, frame_valid, pixclk, gnd). instead, just th ree wires (two serial lvds, one gnd) are sufficient to carry the video signal. configuration of sensor for stand-al one serial output with internal pll in this configuration, the internal pll ge nerates the shift-clk (x12). the lvds pins ser_dataout_p and ser_dataout_n must be connected to a deserializer (clocked at approximately the same system clock frequency). figure 6 shows how a standard off-the-shel f deserializer (national semiconductor ds92lv1212a) can be used to retrieve the standard parallel video signals of d out [9:0], line_valid and frame_valid. figure 6: stand-alone topology typical configuration of the sensor: 1. power up sensor. 2. enable lvds driver (set r0xb3[4]= 0). 3. de-assert lvds power-down (set r0xb1[1] = 0. 4. issue a soft reset (set r0x0c[0] = 1 followed by r0x0c[0] = 0. if necessary: 5. force sync patterns for the deserializer to lock (set r0xb5[0] = 1). 6. stop applying sync patte rns (set r0xb5[0] = 0). s ensor lvd s bypa ss _ c lkin lvd s s er_datain lvd s s hift_ c lkout d s 92lv1212a 82 line_valid frame_valid pixel lvd s s er_dataout 2 6 . 6 mhz os c . c lk 2 6 . 6 mhz os c . 8 meters (maximum) 8- b it c onfi g uration shown
pdf: 09005aef824c9998/source: 09005aef824c999c micron technology, inc., reserves the right to change products or specifications without notice. mt9v032_lds_2.fm - rev. b 3/07 en 11 ?2006 micron technology, inc. all rights reserved. mt9v032: 1/3-inch wide-vga digital image sensor appendix a ? serial configurations preliminary ? configuration of sensor for stereo scopic serial output with internal pll in this configuration the internal pll gener ates the shift-clk (x18) in phase with the system-clock. the lvds pins ser_dataout_p and ser_dataout_n must be connected to a deserializer (clocked at appr oximately the same system clock frequency). figure 7 shows how a standard off-the-shelf de serializer can be used to retrieve back d out (9:2) for both the master and slave sensors. additional logic is required to extract out line_valid and frame_valid embedded within the pixel data stream. figure 7: stereoscopic topology typical configuration of the master and slave sensors: 1. power up the sensors. 2. broadcast write to de-assert lvds power-down (set r0xb1[1] = 0). 3. individual write to master sensor putting its internal pll into bypass mode (set r0xb1[0] = 1). 4. broadcast write to both sensors to set the stereoscopy bit (set r0x07[5] = 1). 5. make sure all resolution, vertical blanki ng, horizontal blanking, window size, and aec/agc configurations are done through broadcast write to maintain lockstep. 6. broadcast write to enable lvds driver (set r0xb3[4] = 0). 7. broadcast write to enable lvds receiver (set r0xb2[4] = 0). 8. individual write to master sensor, putting its internal pll into bypass mode (set r0xb1[0] = 1). 9. individual write to slave sensor, enabli ng its internal pll (set r0xb1[0] = 0). 10. individual write to slave sensor, setting it as a stereo slave (set r0x07[6] = 1). 11. individual writes to mast er sensor to minimize th e inter-sensor skew (set r0xb2[2:0], r0xb3[2:0], and r0xb4[1:0] appropriately). use r0xb7 and r0xb8 to get lockstep feedback from stereo_error_flag. 12. broadcast write to issue a soft reset (set r0x0c[0] = 1 followed by r0x0c[0] = 0). note: the stereo_error_flag is set if a mismatch has occurred at a reserved byte (slave and master sensor?s codes at this reserved byte must match). if the flag is set, steps 11 and 12 are repeated until the stereo_error_flag remains cleared. x 1 8/x 1 2 pl l s en s or s en s or d s 92lv1 6 8 8 pixel pixel from from s lave ma s ter s en s or s lave ma s ter 1. pll in non- b ypass mo d e 1. pll in b ypass mo d e 2. pll in x 18 mo d e (stereos c opy) lv an d fv are em b e dd e d in the d ata stream 2 6 . 6 mhz os c . lvd s s er_datain lvd s bypa ss _ c lkin lvd s s er_datain lvd s bypa ss _ c lkin lvd s s hift_ c lkout lvd s s er_dataout 5 meters (maximum) 2 6 . 6 mhz os c . lvd s s er_dataout lvd s s hift_ c lkout
pdf: 09005aef824c9998/source: 09005aef824c999c micron technology, inc., reserves the right to change products or specifications without notice. mt9v032_lds_2.fm - rev. b 3/07 en 12 ?2006 micron technology, inc. all rights reserved. mt9v032: 1/3-inch wide-vga digital image sensor appendix a ? serial configurations preliminary ? broadcast and individual writ es for stereoscopic topology in stereoscopic mode, the two sensors are required to run in lockstep. this implies that control logic in each sensor is in exactly the same state as its pair on every clock. to ensure this, all inputs that affect control lo gic must be identical and arrive at the same time at each sensor. these inputs include: ? system clock ? system reset ? two-wire serial interface clk - scl ? two-wire serial interface data - sda figure 8: two-wire serial interface configuration in stereoscopic mode the setup in figure 8 shows how the two se nsors can maintain lockstep when their configuration registers are written through th e two-wire serial interface. a write to configuration registers would either be broadcast (simultaneous writes to both sensors) or individual (write to just one sensor at a time). reads from configuration registers would be individual (reads from just one sensor at a time). one of the two serial interface slave address bi ts of the sensor is hardwired. the other is controlled by the host. this allows the host to perform either a broadcast or a one-to- one access. broadcast writes are performed by setting the same s_ctrl_adr input bit for both slave and master sensor. individual writ es are performed by setting opposite s_ctrl_adr input bit for both slave and mast er sensor. similarly, individual reads are performed by setting opposite s_ctrl_adr input bit for both slave and master sensor. s lave s en s or ma s ter s en s or all system c lo c k len g ths (l) must b e equal. sc l an d s da len g ths to ea c h sensor (from the host) must also b e equal. host laun c hes sc l an d s da on positive e dg e of s y sc lk. sc l s da ho s t 2 6 . 6 mhz os c . l l l c lk s _ c trl_adr[0] c lk s _ c trl_adr[0] c lk sc l sc l s da s da
pdf: 09005aef824c9998/source: 09005aef824c999c micron technology, inc., reserves the right to change products or specifications without notice. mt9v032_lds_2.fm - rev. b 3/07 en 13 ?2006 micron technology, inc. all rights reserved. mt9v032: 1/3-inch wide-vga digital image sensor revision history preliminary ? revision history rev. b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3/28/2007 ? updated package drawing

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